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Beginners Guide to Fiber Optic Bit Error Ratio (BER) Measurement
By Colin Yao
Bit error ratio (BER) measurement is the fundamental measurement of the quality of the
fiber optic communication system. It measures the system's probability that transmitted
bits will be correctly received as logic ones and zeros.
Bit error ratio is the ratio of the number of bits received incorrectly compared to the
number of bits transmitted in a specified time interval or quantity of bits. The typical
acceptable BER levels range from 1e-9 to 1e-12.
Equipment for testing BER
The equipment used to test a fiber optic system's BER is called BERT (bit error ratio
tester). BERT has two fundamental parts: a signal pattern generator and an error detector.
What is a signal pattern generator and how does it work?
The pattern generator is responsible for producing a known data sequence to the system
under test. The test patterns are often designed to intentionally stress some aspect of
the system under test such as a pattern sequence that is difficult for the clock recovery
system to synchronize.
Signal patterns being generated
The patterns being generated also must be similar to the real traffic that will be used
in the system. The most common pattern is the pseudo-random binary sequence (PRBS).
PRBS patterns can produce all possible combinations of ones and zeros for a given
pattern length. For example, a 2^7-1 PRBS pattern will produce all possible combinations
of 7 bit binary numbers.
Pattern generators can generate very long pattern sequence such as a 2^31-1 sequence
which has all combinations of 31 bit binary numbers.
What is a error detector and how does it work?
The error detector is on the receiving end of the system being tested. Its functionality
is to determine whether the received data matches the transmitted pattern.
The system under test is being fed with the data pattern from the pattern generator.
The system has a decision circuit to determine whether the received bit is a one or a
zero. The system's decision circuit output is then fed to the error detector.
The error detector has a built-in internal pattern generator which generates reference
pattern identical to the pattern from the pattern generator.
The error detector's internal reference pattern signal is then synchronized to the
output from the system under test. The the bits are compared bit by bit between these two
signals. Then the bit error ratio is determined by dividing the number of incorrectly
received bits to the total number of bits transmitted.
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